1. Field of the Invention
This invention relates generally to processes and methods used in the manufacture of integrated circuit devices, and relates more particularly to a method for filling indentations to planarize the surface of a wafer.
2. Description of the Relevant Art
Grooves, trenches and other indentations are produced in semiconductor wafer processing either deliberately, as in trench isolation for integrated circuits, or incidentally, as in bird's head free oxide isolation using the nitride masked side wall method. Such indentations present obstacles to forming overstructures in subsequent processing steps. In the case of metal interconnect lines, for example, it is difficult to ensure electrical continuity when the interconnect line must span an indentation like an isolation trench that may be six to eight micrometers deep.
Others have attempted to solve this problem by coating the surface of the wafer with a layer of fill material such as oxide, nitride, or polysilicon to fill in the indentations, and then dry etching to remove the fill material layer down to the surface of the wafer, leaving the indentations filled with residual fill material. Unfortunately, this approach has not worked satisfactorily for a variety of reasons. First, the dry etching process does not consistently remove all of the fill material from the surface of the wafer, thereby causing problems during later processing steps. Second, the dry etching process is not selective enough to remove the fill material from the surface of the wafer but not the wafer material. Third, the application onto the wafer of some of the fill materials requires that the wafer be raised to a high temperature, which can stress the wafer material particularly at the boundaries between thin films of different coefficients of expansion and thereby destroy the usefulness of the transistors. The high temperature will also diffuse previously doped regions, making it impossible to hold the critical dimensions necessary for small geometry, high speed transistors or very large scale integrated circuits.